1. Field of the Invention
This invention relates to a thin film transistor, and more particularly to a thin film transistor and a fabricating method thereof that is adaptive for increasing a capacitance of a storage capacitor.
2. Description of the Related Art
Generally, a liquid crystal display (LCD) includes switching devices consisting of thin film transistors having gate electrodes, a gate insulating film, an active layer, an ohmic contact layer and source and drain electrodes, and liquid crystal injected between a lower plate provided with pixel electrodes and an upper plate provided with color filters.
The thin film transistor (TFT) uses a storage capacitor so as to improve a sustaining characteristic of a liquid crystal application voltage and to stabilize a display of a gray scale. The storage capacitor can be classified into the storage on gate (SOG) system, in which a portion of the (nxe2x88x921)th gate line is used as a lower electrode of a capacitor in the nth pixel, and the storage on common (SOC) system, in which a lower electrode of a capacitor is separately formed to be connected to a common electrode. Both the SOG system and the SOC system have such a structure that a gate insulating film provided between a lower electrode formed along with the gate electrode and an upper electrode formed along with the source and drain electrodes is used as a dielectric film.
FIGS. 1A to 1C show a process of fabricating a conventional TFT. Referring to FIG. 1A, an aluminum (Al) layer or a copper (Cu) layer, etc. is deposited on a transparent insulating substrate 11 including a transistor area T1 and a capacitor area C1 by the sputtering technique to form a metal thin film. Then, the metal thin film is patterned by photolithography, including a wet method, to form a gate electrode 13 at the transistor area T1 of the insulating substrate 11. At this time, the metal thin film also is patterned in such a manner to be left at the capacitor area C1 of the insulating film 11, thereby forming a lower electrode 15 of the capacitor. The lower electrode 15 consists of a gate line or a separate wire.
Referring to FIG. 1B, a gate insulating film 17, an active layer 19 and an ohmic contact layer 21 are sequentially formed on the insulating substrate 11 by the chemical vapor deposition (CVD) technique in such a manner as to cover the gate electrode 13 and the lower electrode 15 of the capacitor. The gate insulating film 17 is formed by deposition of an insulation material such as silicon oxide or silicon nitride, and the active layer 19 is formed from an amorphous silicon material or a polycrystalline silicon material that is not doped with an impurity. The ohmic contact layer 21 is made from amorphous silicon material or polycrystalline silicon material doped with an n-type or p-type impurity at a high concentration.
The ohmic contact layer 21 and the active layer 19 are patterned by photolithography, including an anisotropic etching in such a manner to be left only at a desired portion of the transistor area T1, to thereby expose the gate insulating film 17. At this time, the active layer 19 and the ohmic contact layer 21 are left only at a portion corresponding to the gate electrode 13.
Referring to FIG. 1C, a metal such as molybdenum (Mo), or a molybdenum alloy such as MoW, MoTa or MoNb, etc., is deposited on the gate insulating film 17 by the CVD or sputtering technique in such a manner as to cover an ohmic contact layer 21, thereby forming a metal thin film. The metal thin film makes an ohmic contact with the ohmic contact layer 21. Then, the metal thin film is patterned by the photolithography to expose the gate insulating film 13, thereby forming source and drain electrodes 23 and 25 at the transistor area T1. At this time, the metal thin film is patterned to be left at the capacitor area C1 in correspondence with the lower electrode 15, thereby forming an upper electrode 27 of the capacitor. In this case, the gate insulating film 17 between the lower electrode 15 and the upper electrode 27 formed at the capacitor area C1 makes a dielectric film. During the patterning for forming the source and drain electrodes 23 and 25 at the transistor area T1, the ohmic contact layer 21 at a portion corresponding to the gate electrode 13 between the source and drain electrodes 23 and 25 also is removed to expose the active layer 19.
As described above, in the conventional TFT fabricating method, the lower electrode, the dielectric film and the upper electrode of the storage capacitor are formed simultaneously upon formation of the gate electrode, the gate insulating film and the source and drain electrodes. As a result, the conventional TFT fabricating method has a problem in that, since the dielectric film of the storage capacitor is formed to have a thickness almost equal to the gate insulating film, it is difficult to increase the capacitance of the storagecapacitor.
Accordingly, it is an object of the present invention to provide a thin film transistor and a fabricating method thereof that are adaptive for increasing a capacitance of the storage capacitor.
In order to achieve these and other objects of the invention, a thin film transistor according to one aspect of the present invention comprises a transparent insulating film including a transistor area and a capacitor area; a gate electrode and a lower electrode of a capacitor formed at the transistor area and the capacitor area of the insulating substrate, respectively; a gate insulating film formed on the insulating substrate to cover the gate electrode and the lower electrode, said gate insulating film has a large thickness at a portion corresponding to the gate electrode while having a small thickness at a portion including the capacitor area; an active layer formed at a portion corresponding to the gate electrode on the gate insulating film; an ohmic contact layer formed at each side of the active layer; source and drain electrodes formed on the gate insulating film to contact the ohmic contact layer; and an upper electrode formed at a portion corresponding to the lower electrode provided at the capacitor area on the gate insulating film.
A method of fabricating a thin film transistor according to another aspect of the present invention includes the steps of forming a gate electrode and a lower electrode of a capacitor at the transistor area and the capacitor area of an insulating substrate, respectively; sequentially forming a gate insulating film, an active layer and an ohmic contact layer on the insulating substrate to cover the gate electrode and the lower electrode; primarily patterning the ohmic contact layer and the active layer in such a manner to be left only at a portion corresponding to the gate electrode of the transistor area and thus expose the gate insulating film; secondarily patterning the ohmic contact layer and the active layer in such a manner to reduce a thickness of the gate insulating film at a portion corresponding to the lower electrode; and forming the source and drain electrodes on the gate insulating film at the transistor area and simultaneously forming an upper electrode of the capacitor at a portion corresponding to the lower electrode on the gate insulating film of the capacitor.